1. Field of the Invention
The present invention relates to methods of mass-producing integrated circuit (IC) devices and particularly to a method of mass-producing simultaneously a plurality of types of IC devices.
2. Description of the Background Art
Referring to FIG. 1A, a part of a ribbonlike substrate used in a method of mass-producing IC devices disclosed in Japanese Patent Publication No. 63-29414(/1988) is shown in a plan view. The substrate 1 is formed of an aluminum plate of 70.times.1000.times.1 mm.sup.3 for example and a film of aluminum oxide is formed on a surface of the substrate 1 by well-known anodization. Index holes 2 are punched at prescribed intervals by a press along edges of both sides of the substrate 1 in its length direction. The index holes 2 define partitions 4 surrounded by chain lines. Each partition 4 crosses the ribbonlike substrate 1 in its width direction. The ribbonlike substrate 1 in FIG. 1A is a substrate for relatively small IC devices and each partition 4 is divided into two regions 4a and 4b by slits 3a punched by a press. One IC device is formed on each of those regions 4a and 4b.
Referring to FIG. 1B, a part of another ribbonlike substrate disclosed in Japanese Patent Publication No. 63-29414 is shown. The substrate in FIG. 1B is similar to that in FIG. 1A, except that index slits 3 are punched in the substrate in FIG. 1B in place of the index holes 2. The index slits 3 define partitions 4 as surrounded by the chain lines. The ribbonlike substrate 1 in FIG. 1B is a substrate for relatively large IC devices and one IC devices formed on each of those partitions 4.
Referring to FIGS. 2A and 2B, a manufacturing process of IC devices using the substrate 1 in FIG. 1B is illustrated. The substrate 1 is moved for each partition 4 by a transport machine (not shown) utilizing the index slits 3 as registering means, so that conductor patterns 5 are formed on the respective partitions 4. A semiconductor IC die 9 is fixed on a pad 51 in each conductor pattern 5 by conductive paste. An electrode on the semiconductor IC die 9 is connected to corresponding conductors in the conductor pattern 5 by wire bonding using fine wires of gold or aluminum. Although the identical conductor patterns 5 are shown in all the partitions 4 in FIGS. 2A and 2B, different patterns may be formed in different partitions 4.
Referring to FIGS. 3A, 3B and 3C, steps of forming a conductor pattern 5 are illustrated in sectional views. A foil 6 of metal such as copper is adhered on an anodized surface of an aluminum substrate 1. A resist pattern 7 is formed on the copper foil 6 by screen process printing. Using the resist pattern 7 as a mask, the copper foil 6 is plated with a precious metal 8 (such as gold, silver or platinum) and after that the resist pattern 7 is removed. Then, using the precious metal plated layer 8 as a mask, the copper foil 6 is etched, whereby the conductor pattern 5 is formed. On this occasion, the respective conductors in the conductor pattern 5 can be formed with a width as small as about 0.5 mm.
However, if a conductor pattern including narrower conductors is desired, the respective conductors may be formed with a width as narrow as about 2 .mu.m by using well-known photolithography. A conductor pattern including very fine conductors can be applied to a large scale integrated circuit (LSI) device or a high frequency circuit having a large number of connection pins.
If resistors are incorporated in a conductor pattern, those resistors can be formed by printing and baking a pattern of a resisting coating material on the substrate 1 by a screen process.
Further, an interfacial insulating layer of polyimide or the like is further formed on the conductor pattern 5 and a pattern of a conductive coating material is printed and baked on the interfacial insulating layer by a screen process, whereby a multilayer connection pattern can be formed.
As shown in FIG. 2B, the ribbonlike substrate 1 where the IC devices are formed is moved for each partition 4 by utilizing the index slits 3 so that the functions of those IC devices are tested. On this occasion, if the conductor pattern 5 includes a resistor pattern, function adjustment of the IC devices can be effected by functional trimming of the resistor pattern. In addition, if any semiconductor IC die 9 contains a defect, it can be replaced with a new semiconductor IC die and thus the production yield of IC devices can be improved. Further, if desired, the adhesion intensity of the bonding wires can be measured. The semiconductor IC dies 9 and the bonding wires can be formed by coating of silicon resin or by partial molding in a transfer molding process.
The ribbonlike substrate 1 holding the plurality of IC devices which have been tested is moved for each partition 4 by utilizing the index slits 3 as marks, so that the respective IC devices are separated individually by a press machine. In this pressing process, only the peripheral portions of a male mold contact the substrate 1 and accordingly no adverse effect is exerted on the respective IC dies 9 or conductor patterns 5 on the substrate 1.
Each separated IC device, to which external leads are soldered, is enclosed in a resin case or dipped in epoxy resin. Thus, the manufacturing of each IC device is completed.
In the above described mass-producing method of IC devices, identical IC devices are normally formed in a plurality of partitions 4; however, different IC devices may be formed in different partitions 4. However, since the substrate 1 is separated for each IC device after the IC devices have been formed in all the partitions 4, the substrate 1 needs to pass through assembling lines for all types of IC devices. More specifically, in the case of forming a plurality of types of IC devices on the substrate 1, the manufacturing efficiency is considerably lowered.